Trigger and Integration Time Controlled by One Input The integration period starts immediately after the falling edge of TRIG1 input signal, stops immediately after the rising edge of TRIG1 input signal, and is immediately followed by a readout period. The readout time depends on pixel number and pixel rate. Figure 8-3. Timing Diagram 8.1.4 Trigger and Integration Time Controlled by Two Inputs TRIG2 rising edge start the integration period. TRIG1 rising edge stop the integration period. This period is immediately followed by a readout period. tt Integration period stop to read-out start delay – 1 μs – ts Integration period stop to TRIG1 rising set-up time 4 μs – – th TRIG1 hold time (pulse high duration) 1 μs – – T

        Table 8-3. Trigger and Integration Time Controlled by One Input Label Description Min Typ Max ti Integration time duration 5 μs – – td1 TRIG1 falling to integration period start delay – 100 ns – td2 TRIG1 rising to integration period stop delay – 1.3 μs – tt Integration period stop to read-out start delay – 1 μs – th TRIG1 hold time (pulse high duration) 1 μs – – Integration N Readout N-1 Readout N Integration N+1 

        Table 8-4. Trigger and Integration Time Controlled by Two Inputs Label Description Min Typ Max ti Integration time duration 5 μs – – td1 TRIG2 rising to integration period start delay – 100 ns – td2 TRIG1 rising to integration period stop delay – 1.3 μs – tt Integration period stop to read-out start delay – 1 μs – th TRIG1 and TRG2 hold time (pulse high duration) 1 μs – – td1 td2 ti tt Integration N Integration N+1 Readout N-1 Readout N

        Output Data Timing This timing corresponds to the input data of the Camera Link interface. The camera output data are not detailed here because fully compliant with the Camera Link standard (serial high-speed interface). Table 8-4. Trigger 

         and Integration Time Controlled by Two Inputs Label Description Min Typ Max ti Integration time duration 5 μs – – td1 TRIG2 rising to integration period start delay – 100 ns – td2 TRIG1 rising to integration period stop delay – 1.3 μs – tt Integration period stop to read-out start delay – 1 μs – th TRIG1 and TRG2 hold time (pulse high duration) 1 μs – – td1 td2 ti tt Integration N Integration N+1 Readout N-1 Readout N TRIG1 TRIG2 Table 8-5. Output Data Timing Label Description Min Typ Max tp Input falling edge to output clock propagation delay – 7 ns – td STROBE to synchronized signals delay -5 ns – +5 ns